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  • CDR10102左侧.png
  • CDR10102右侧.png
  • CDR10102正侧.png

10G Clock Data Recovery

Classification:


PSS clock data recovery is a high-performance, cost-effective CDR module that can extract clock signals from data signals of the environments such as optical modules or backplanes. It supports automatic locking of 6.5M~11.3Gbps rate signals and is easy to operate. It is widely used in PON, serial loopback line detection and conventional multi-channel optoelectronic test environments.


  • Application
  • Characteristic
  • Specifications
  • Download
    • Commodity name: 10G Clock Data Recovery
    • 型号: PSS CDR10102
    • Describe: Support 0.0065~11.3Gbps NRZ optical signal clock recovery

    PSS clock data recovery is a high-performance, cost-effective CDR module that can extract clock signals from data signals of the environments such as optical modules or backplanes. It supports automatic locking of 6.5M~11.3Gbps rate signals and is easy to operate. It is widely used in PON, serial loopback line detection and conventional multi-channel optoelectronic test environments.

    Application

     

     

     

     

     

     

     

     

     

     

     

    1. PON network product testing
    2. Optical module testing
    3. Optical-electrical test environment clock extraction

     

    Features
    1. Channel test: support FC/UPC signal input
    2. 6.5M~11.3Gbps rate signal Auto Lock
    3. Unnecessary to input reference clock
    4. Support input data rate readback function
    5. Exceed SONET/SDH jitter transmission, generation, tolerance requirements
    6. Support programmable jitter transmission broadband, support G.8251OTN
    7. Support sampling phase adjustment (5.65Gbps or higher)
    8. Loss signal detection and Loss of lock (LOL) signal lock status real-time display for easy observation
    9. High-precision detection range: optical signal supports -15dBm signal input as the minimum
    10. Support device button control, display screen data display, no external computer required
    11. Support device program control, provide secondary development interface

     

    Specification

  • • Channel Test: Supported FC/UPC Signal Input

    • 6.5M~11.3Gbps Rate Signal Auto Lock

    • No reference clock input required

    • Supports input data rate readback function

    • Beyond SONET/SDH Jitter Transfer 、 Generation 、 Tolerance Requirements

    • Supports programmable jitter transfer bandwidth, supports G.8251OTN

    • Supports sample phase adjustment ( 5.65Gbps or higher)

    • Loss Signal Detection and Loss of lock (LOL) Real-time display of signal lock status , Easy to observe

    • High-precision detection range: Minimum optical signal support -15 dBm Signal Input

    • Supports device button control, Display screen Data display, no external computer required

    • Supports device program control, provides secondary development interface

     

     

  • Parameter

    Unit

    Minimum Value

    Typical Value

    Maximum Value

    Remarks

    Technical Parameters

    Data Range

     

    6.5Mbps

     

    11.3Gbps

    Adaptive

    Optical Signal Input Range

    dB

    -15

     

    0

     

    Clock Locking Accuracy

    ppm

     

    ± 100

     

     

    Auto Lock Time

    ms

    0.5

     

    24

     

    Output Jitter [1]

    mUI

     

     

    4.5

    OC-192

     

     

    5

    8GFC

     

     

    2.5

    OC-48, 12kHz to 20MHz

     

     

    0.7

    OC-12,12kHz to 5 MHz

     

     

    0.2

    OC-3,12kHz to 1.3 MHz

    Clock Output Amplitude

    mV

    200

     

    655

    Differential Amplitude

    Impedance

    Ω

    50

     

    Interface Type

     

    AC Coupling

    Single-Ended

    Clock Divider

     

    2/4/8/16

     

    Optical Interface

     

    FC/UPC(62.5/125um)

     

    Electrical Interface

     

    Female SMA(3.5mm)

    Trig Interface

    Other

    Additional Functions

     

    Button support, Display

     

    Communication Interface

     

    RS232

     

    Operating Storage Temperature

    ℃

    0 ~ 40

     

    Operating Voltage

     

    AC100V ~ 240V,50 、60HZ

    Equipped with 220V Power Cord

    Dimensions

    mm

    370×216×104mm

     

    Warranty Period

    Year

    1

     

    Note [1] :Specific jitter parameters are shown in the "Jitter Parameters" table.

    Jitter Parameters (Phase-Locked Loop Characteristics)

    Parameter

    Unit

    Minimum Value

    Typical Value

    Maximum Value

    Remarks

    Jitter Transfer Bandwidth ( BW )

    OC-192

    kHz

     

    1064

    1650

    BW=3

    294

    529

    OTN mode, BW=1

    8GFC

    kHz

     

    1242

    1676

     

    OC-48

    kHz

     

    663

    896

    BW=4 (Default value)

    157

    181

    OTN mode, BW=1

    OC-12

    kHz

     

    175

     

     

    OC-3

    kHz

     

    44

     

     

    Jitter Peaking

    OC-192

    dB

     

    0.014

    0.024

    20kHz to 80MHz

    8GFC

    dB

     

    0.004

    0.021

    20kHz to 80MHz

    OC-48

    dB

     

    0.004

    0.023

    20kHz to 10MHz

    OC-12

    dB

     

    0.01

     

     

    OC-3

    dB

     

    0.01

     

     

    Jitter Generation

    OC-192

    UI rms

     

    0.0045

    0.0067

    Unfiltered

    UI p-p

    0.076

     

    Unfiltered

    8GFC

    UI rms

     

    0.005

     

    Unfiltered

    UI p-p

    0.044

    Unfiltered

    OC-48

    UI rms

     

    0.0025

     

    12kHz to 20MHz

    UI rms

     

    0.0046

    Unfiltered

    UI p-p

    0.0156

     

    12kHz to 20MHz

    UI p-p

     

    0.0276

    Unfiltered

    OC-12

    UI rms

     

    0.0007

     

    12kHz to 5MHz

    UI rms

     

    0.0011

    Unfiltered

    UI p-p

    0.0038

     

    12kHz to 5MHz

    UI p-p

     

    0.0076

    Unfiltered

    OC-3

    UI rms

     

    0.0002

     

    12kHz to 1.3MHz

    UI rms

     

    0.0003

    Unfiltered

    UI p-p

    0.0008

     

    12kHz to 1.3MHz

    UI p-p

     

    0.0018

    Unfiltered

    Jitter Tolerance ( BW=4 Default value)

    OC-192

    UI p-p

     

    4255

     

    2000Hz

    UI p-p

    106

    20kHz

    UI p-p

    3.78

    400kHz

    UI p-p

    0.46

    4MHz

    UI p-p

    0.42

    80MHz

    OC-48

    UI p-p

     

    1528

     

    600Hz

    UI p-p

    378

    6kHz

    UI p-p

    16.6

    100kHz

    UI p-p

    0.7

    1MHz

    UI p-p

    0.63

    20MHz

    OC-12

    UI p-p

     

    193

     

    30Hz

    UI p-p

    44

    300Hz

    UI p-p

    19.2

    25kHz

    UI p-p

    0.82

    250kHz

    UI p-p

    0.6

    5MHz

    OC-3

    UI p-p

     

    50

     

    30Hz

    UI p-p

    24

    300Hz

    UI p-p

    14.4

    6500Hz

    UI p-p

    0.8

    65kHz

    UI p-p

    0.61

    1.3MHz

    The above data conditions: input data mode PRBS 23 ,AC coupling to 100 Ω differential termination load, I2C Default register settings


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